Programming in R: adjusting USD prices for inflation

Unfortunately, adjusting daily USD prices for inflation in R is not as straightforward as one might hope. It requires the download of the monthly Consumer Price Index statistics (CPI) from the US Bureau of Labor Statistics (BLS) using the blscrapeR library. And then some fiddling with the dates before the inflation factors can be merged into the price table.

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Deploying PeerTube on RHEL / CentOS / AlmaLinux / Rocky Linux using podman-compose

Three years ago I installed PeerTube for the first time on my CentOS 8 server (now CentOS 8 Stream). Red Hat frustrated the installation of Docker on this system, so I had to use podman and podman-compose instead.

Over the years podman and podman-compose evolved and the existing install deteriorated, resulting in a PeerTube server that had issues starting up using podman-compose due to a new network setup and PeerTube somehow was no longer offering the administrator functionality. Since I had hardly published any movies, I decided to completely start over with a fresh install.

Even though I did this setup on my (now slightly outdated) CentOS 8 Stream server, the same procedure should work for other and more recent RHEL, CentOS Stream, AlmaLinux and Rocky Linux systems.

Read more: Deploying PeerTube on RHEL / CentOS / AlmaLinux / Rocky Linux using podman-compose

Installing the Stable Diffusion v1 model and Hugging Face's Diffusers library on a Fedora workstation

Diffusers is an open-source Python library provided by Hugging Face (a US company). The library allows you to easily use various pre-trained diffusion models.

In this article we describe how to install the Stable Diffusion model and the Diffusers library on a Fedora (36) Linux workstation.

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Testing Semiconductor Memories

An Open Notation for Memory Tests

Aad Offerman and Ad J. van de Goor: An Open Notation for Memory Tests (also available in PostScript format)
(presented at the IEEE International Workshop on Memory Technology, Design and Testing, 1997).

Cited by:

• Michael Linder, Alfred Eder, Ulf Schlichtmann, Klaus Oberlander: An Analysis of Industrial SRAM Test Results – A Comprehensive Study on Effectiveness and Classification of March Test Algorithms, IEEE Design and Test 31(3):42-53, June 2014;
• Michael Linder: Test Set Optimization for Industrial SRAM Testing, Dissertation, Fakultät für Elektrotechnik und Informationstechnik, Technischen Universität München, 2012-2013;
• Sonal Sharma, Vishal Moyal: FSM Based BIST Architecture, International Journal of Engineering Sciences & Management, April-June, 2012;
• M. Linder, A. Eder, K. Oberlander, M. Huch: Variations of fault manifestation during Burn-In — A case study on industrial SRAM test results, IEEE 17th International On-Line Testing Symposium (IOLTS), 2011, pages 218-221;
• A. Kokrady, R. Mehrotra, T.J. Powell, S. Ramakrishnan: Reducing design verification cycle time through testbench redundancy, 19th International Conference on VLSI Design, 2006, pages 6. Held jointly with 5th International Conference on Embedded Systems and Design;
• Zaid Al-Ars: DRAM Fault Analysis and Test Generation, Dissertation, Delft University of Technology, June 2005;
• K. Thaller, A. Steininger: A transparent online memory test for simultaneous detection of functional faults and soft errors in memories, IEEE Transactions on Reliability, Volume 52, Issue 4, pages 413-422, December 2003;
• Farbod Karimi, V. Swamy Irrinki, T. Crosby, Fabrizio Lombardi: Parallel testing of multi-port static random access memories, Microelectronics Journal 34(1):3-21, January 2003;
• F. Karimi, F. Lombardi: A scan-BIST environment for testing embedded memories, Proceedings of the Eighth IEEE International On-Line Testing Workshop, 2002, pages 211-217;
• Z. Al-Ars, A.J. van de Goor, J. Braun, D. Richter: A memory specific notation for fault modeling, 10th Asian Test Symposium, 2001, Proceedings pages 43-48;
• Karl Thaller: A Highly-Efficient Transparent Online Memory Test, Proceedings of the 2001 IEEE International Test Conference, p.230, October 30 - November 1, 2001;
• This email address is being protected from spambots. You need JavaScript enabled to view it.: Programmable Embedded Memory BIST Using Embedded Processor;
• This email address is being protected from spambots. You need JavaScript enabled to view it.: Programmable BIST Architecture to find faults based on defect injection;
• US Patent 6496950: Testing content addressable static memories;
• US Patent 6550032: Detecting interport faults in multiport static memories;
• US Patent 6757854: Detecting faults in dual port FIFO memories.

Aad Offerman and Ad J. van de Goor: An Open Notation for Memory Tests (also available in PostScript format)
(Technical Report No.1-68340-44(1997)07, Delft University of Technology)

Cited by:

• US Patent 8829898: Method and apparatus for testing.

This paper contains the description of a language that was intended to be open, and at the same time handle most of the tests used these days. The result may be a little overwhelming.

We have realized that building and building on top of this open notation is not the way to go in the long run, and are thinking about better solutions at the moment. The next step will probably be a language that looks more like a general programming language providing facilities commonly used in memory tests. Furthermore, it is tempting to try to design notations for the specification of faults and for memory architectures at the same time, and make good use of the fact that the three of them are so closely related. However, this only exists in our heads yet, so no paper on this can be provided at the moment.

Read more: Testing Semiconductor Memories